Chinese translation for "phase margin"
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- 相补角, 允许相位失真, 相位容限[余量
相位边距
相位边限
相位边缘
相位冗
相位余量
相位裕度
相位馀裕
相限
Related Translations:
- Example Sentences:
| 1. | Design of pll frequency synthesizer by the method of extreme value phase margin
锁相跳频源的极值相位裕量设计法 | | 2. | 3 . a good result is gotten under the star - hspice simulation . the dc gain is 90 db , the offset voltage is 40 u v while driving 10k , the unity - gain frequency is 10mhz with phase margin 67 , the slew rate is 10w us while driving 10pf
用star - hspice仿真软件对电路仿真，在1 . 5v电源电压、直流10k负载、交流10pf负载的情况下，整个共模电压范围内跨导基本保持恒定，只有18的变化，直流增益90db ，单位增益带宽10mhz ，相位裕度80度，压摆率10v s 。 | | 3. | Firstly , a two - stage structure for the ota is presented after comprehensive considerations on characteristics like open - loop gain , unity - gain bandwidth , phase margin and settling time . then the input and output topologies have been decided by comparing different structure available for this purpose
首先,通过对ota开环增益、单位增益带宽、相位裕度和建立时间等性能指标的分析,并对比了几种典型运放结构,设计开发了一种cmos全差分共源共栅两级运算放大器框架。 | | 4. | Usually the low power operational amplifier is designed with rail to rail output stage , whose signal dynamirange is small , its output driving force is not strong , here it is designed with voltage displacement stage , and the strong driving force and the low power consumption in this circuit are achieved . with 5v single power , this amplifier consumes only several a , 100khz unity - gain frequency , achieves 80db dc open gain and 55 phase margin for a 100pf load capacitance and a 1m load resistance and other advantages
通常设计的低功耗轨对轨输出运算放大器中,由于信号的动态范围比较小,它的输出驱动能力不强,这里设计的是采用电平位移电路同时实现了电路的强驱动能力与低功耗,它具有在单电源电压5v的条件下,静态工作电流只有几微安,单位增益带宽达100k ,开环增益能达80db以上,相位裕度也能达55度,输出源沉电流达500微安以上等优点。 | | 5. | Contrapose to the instability of the third - order charge - pump pll system , the loop optimization method is employed in system level design to decide the bandwidth and phase margin , therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system . according to tsmc 0 . 35 m sige bicmos model , the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre
5 .根据tsmc0 . 35 msigebicmos工艺模型,利用cadencespectre模拟软件对所设计的电荷泵锁相环路中各个模块及整个系统进行了模拟仿真,模拟结果显示,在1 . 5v电源电压下,频率为200mhz的参考输入信号,输出中心频率为800mhz ,分频电路采用4分频,环路带宽为10mhz ,捕获时间大约为0 . 92 s ,功耗大约为15mw ,达到了设计指标。 |
- Similar Words：
- "phase magnet" Chinese translation, "phase magnifier" Chinese translation, "phase magnitude display" Chinese translation, "phase magnitude plot" Chinese translation, "phase map" Chinese translation, "phase margin of control system" Chinese translation, "phase mass" Chinese translation, "phase match" Chinese translation, "phase matched for parametric process" Chinese translation, "phase matching" Chinese translation
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